Static Timing Analysis for Nanometer Designs

English, J. Bhasker, Rakesh Chadha, 2011
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"Static Timing Analysis for Nanometer Designs" is a technical book that focuses on the temporal verification of digital circuits in semiconductor technology. It is aimed at engineers involved in the development of nanometer designs and provides a comprehensive introduction to static timing analysis. The book addresses the challenges encountered in achieving the required timing goals and explains the methods for verifying these goals. It is the result of years of experience from the authors in the field of timing verification and offers valuable insights into the various aspects of static timing analysis. The book is an essential resource for design engineers seeking a central reference to familiarize themselves with the fundamentals and advanced techniques of timing verification. It is written in English and presents a structured approach to a complex topic that is crucial for the successful development of semiconductor chips.

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